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Product Family / Category

RTA

Product / Topic

RTA-OSEK

Type

Manual / Technical Documentation

Title

RTA-OSEK V4.0.0 Port Data Sheet for the Freescale MPC55xx VLE with Wind River Compiler

RTA-OSEK V4.0.0 Port Data Sheet for the Freescale MPC55xx VLE with Wind River Compiler

RTA-OSEK V4.0.0 Port Data Sheet for the Freescale MPC55xx VLE with Wind River Compiler

Typical RTOS overheads (based on example 8-task application built with BCC1):

  • 1770 bytes ROM
  • 128 bytes RAM data
  • 1264 bytes RAM stack
  • Category 2 ISR Latency: 114 CPU cycles
  • OSEK-OS V2.2 Certified

Hardware Environment
RTA-OSEK supports all variants of the Freescale MPC55xx VLE family.

Software Environment
The RTA-OSEK Component for the Freescale MPC55xx VLE was built using the following tools:

  • Wind River Systems, Inc. DCC Version 5.3.2.0
  • Wind River Systems, Inc. DAS Version 5.3.2.0
  • Wind River Systems, Inc. DLD Version 5.3.2.0

Please contact ETAS for details about compatibility with newer versions of this compiler.

 

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