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Product Family / Category RTA |
Product / Topic RTA-OSEK |
Type Manual / Technical Documentation |
Title RTA-OSEK V4.0.0 Port Data Sheet for the Renesas M16C with IAR Compiler |
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RTA-OSEK V4.0.0 Port Data Sheet for the Renesas M16C with IAR Compiler
Typical RTOS overheads (based on example 8-task application built with BCC1):
- 1765 bytes ROM
- 66 bytes RAM data
- 416 bytes RAM stack
- Category 2 ISR Latency: 106 CPU cycles
- OSEK-OS V2.2 Certified
Hardware Environment
RTA-OSEK supports all variants of the Renesas M26C family: M16C/1x, M16C/2x, M16C/3x and M16C/6x
Software Environment
The RTA-OSEK Component for the Renesas M16C was built using the following tools:
- IAR C/EC++ Compiler Version 2.10A
- IAR Assembler Version 2.10A
- IAR XLink Linker Version 4.55C
Please contact ETAS for details about compatibility with newer versions of this compiler.
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PDF · 327.7 KB · 10/14/2009